いやー、第20回ですって。
引用 Keynote: Introducing the Universal Verification Methodology (UVM) in SystemC and SystemC AMS The UVM-SystemC Language Reference Manual and associated class library will be handed to the Accellera Systems Initiative enabling further development and standardization.
にあるように、公開されるようですね。
引用 Out-of-Order Parallel Simulation of SystemC Models using Intel MIC Architecture This talk presents a project of CECS and Intel which builds a parallel SystemC simulation framework that is fully compliant with the SystemC execution semantics. We employ an out-of-order scheduling technique that exploits maximum parallelism without loss of accuracy. The project targets modern many-core platforms, in particular Intel's Many-Integrated-Core (MIC) architecture. Early results on highly parallel applications show simulation speedup by orders of magnitude.
Intel MICを使って、SystemCの並列シミュレーション。面白そうですね。
