はじめに

Xilinx ZynqMP SoC VIP の中を調べる(その13)

今回は、シミュレーションの実行について説明します。

シミュレーションの実行

下記のテストプログラム (test.cpp) を使ってシミュレーションを実行します。

c++
#include <stdio.h>

#include "dpi.h"

unsigned int zynq_read(unsigned int addr) {
    unsigned int data;
    vip_read32(addr, &data);
    return data;
}

void zynq_write(unsigned int addr, unsigned int data) {
    vip_write32(addr, data);
}

void wait_clock(int count) {
    vip_nop(count);
}

extern "C" {

int dpi_main() {

  unsigned int addr, data, exp;

  printf("dpi_main : start\n");
  addr = 0xa0000000;
  data = 0xffffffff;
  exp = 0xf000000f;

  wait_clock(10);

  zynq_write(addr, data);
  data = zynq_read(addr);

  if(data != exp) {
    printf("<<ERR>> : unmatched DATA(0x%x) != EXP(0x%x)\n", data, exp);
  }

  wait_clock(10);

  printf("dpi_main : finish\n");
  return 0;
}

}

xsc コマンドで、test.cpp をコンパイル後、simulate.sh にてシミュレーションを実行します。

xsc test.cpp
Multi-threading is on. Using 6 slave threads.
Running compilation flow/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/g++  -fPIC -c -Wa,-W -fPIC -m64 -B/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/../../binutils-2.37/bin/    -I"/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/data/xsim/include" -I"/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/data/xsim/systemc" "test.cpp" -o "xsim.dir/work/xsc/test.lnx64.o" -DXILINX_SIMULATOR -Wno-deprecated-declarations
Done compilationGCC Decoupling - Adding extra -std=c++11 -L switchs to link line
Linking with command:
/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/g++ -Wa,-W  -O -fPIC  -m64  -shared  -o "xsim.dir/work/xsc/dpi.so" "xsim.dir/work/xsc/test.lnx64.o"     -L/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o -lrdi_simulator_kernel  -lrdi_xsim_systemc -std=c++11 -L/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o/Default  -B/mnt/usb/XILINX/Vivado/2022.1/Vivado/2022.1/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/../../binutils-2.37/bin/

Done linking: "xsim.dir/work/xsc/dpi.so"

./simulate.sh
xsim tb_behav -key {Behavioral:sim_1:Functional:tb} -tclbatch tb.tcl -protoinst protoinst_files/mpsoc_preset.protoinst -log simulate.log

途中略

running the tb
WARNING: 5 ns tb.mpsoc_sys.mpsoc_preset_i.zynq_ultra_ps_e_0.inst.M_AXI_HPM0_FPD.master.IF : ARESET_N can't be X/Z after 1 cycle of clock. To downgrade, use <hierarchy_path to VIP>.IF.set_enable_xchecks_to_warn(), or filter using clr_enable_xchecks.
WARNING: 5 ns tb.mpsoc_sys.mpsoc_preset_i.zynq_ultra_ps_e_0.inst.M_AXI_HPM1_FPD.master.IF : ARESET_N can't be X/Z after 1 cycle of clock. To downgrade, use <hierarchy_path to VIP>.IF.set_enable_xchecks_to_warn(), or filter using clr_enable_xchecks.
[510] : *ZYNQ_MPSoC_BFM_INFO : POR and STRB Reset called for 0x1
[710] : *ZYNQ_MPSoC_BFM_INFO : POR and STRB Reset called for 0x0
[710] : *ZYNQ_MPSoC_BFM_INFO : FPGA Soft Reset called for 0x1
[2710] : *ZYNQ_MPSoC_BFM_INFO : POR and STRB Reset called for 0x1
[2710] : *ZYNQ_MPSoC_BFM_INFO : FPGA Soft Reset called for 0x0
Start dpi_main 4710 ns
dpi_main : start
[4890] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Starting Address(0xa0000000) -> AXI Write -> 4 bytes
  BURST addr a0000000 i 1 J 16 new_data xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx000000000000000000000000ffffffff new_strb x
[5285] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Done AXI Write for Starting Address(0xa0000000) with Response 'OKAY'
[5285] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Starting Address(0xa0000000) -> AXI Read -> 4 bytes
[5625] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Done AXI Read for Starting Address(0xa0000000) with Response 'OKAY'
dpi_main : finish
Finish dpi_main 5810 ns
Simulation completed
$stop called at time : 5810 ns : File "/mnt/c/Users/haray/home/src/vivado/zynqmpsoc/zynqmpsoc.srcs/sim_1/imports/mpsoc_preset/mpsoc_tb.v" Line 92
## quit
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
Executing Axi4 End Of Simulation checks
INFO: [Common 17-206] Exiting xsim at Sun Jul 31 14:47:58 2022...

上記の Start dpi_main から Finish dpi_main の部分が dpi_main を呼び出しているところです、dpi_main : start から dpi_main : finish が C言語側の dpi_main 関数内で実行されています。AXIへの write/read を1回行っています。

Start dpi_main 4710 ns
dpi_main : start
[4890] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Starting Address(0xa0000000) -> AXI Write -> 4 bytes
  BURST addr a0000000 i 1 J 16 new_data xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx000000000000000000000000ffffffff new_strb x
[5285] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Done AXI Write for Starting Address(0xa0000000) with Response 'OKAY'
[5285] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Starting Address(0xa0000000) -> AXI Read -> 4 bytes
[5625] : M_AXI_HPM0_FPD : *ZYNQ_MPSoC_BFM_INFO : Done AXI Read for Starting Address(0xa0000000) with Response 'OKAY'
dpi_main : finish
Finish dpi_main 5810 ns
Simulation completed
$stop called at time : 5810 ns : File "/mnt/c/Users/haray/home/src/vivado/zynqmpsoc/zynqmpsoc.srcs/sim_1/imports/mpsoc_preset/mpsoc_tb.v" Line 92
## quit

おわりに

今回はシミュレーションの実行をみてみました。

次回は、C言語側のテストプログラムを複数個使う場合について説明します。

Vengineerの戯言

人生は短いけど、長いです。人生を楽しみましょう！

Xilinx ZynqMP SoC VIP の中を調べる(その13)

はじめに

シミュレーションの実行

おわりに