Vengineerの妄想

人生を妄想しています。

Tenstorrent Blackhole の tt-zephyr-platforms (その3)

TenstorrentのBlackholeには、4個のARC CPUが搭載されています。このARC上で動いているのが、tt-zephyr-platforms のようです。

今回は、公開されている tt-zephyr-platforms の中を覗いてみます。

NotebookLMの音声概要

tt-zephyr-platforms

今回は、Board の dts (P300) を見てみます。

Board の dts (P300)

P300

最初に、tt_blackhole_dmc.dtsi を includesしています。

/dts-v1/;
#include <st/g0/stm32g0b1Xe.dtsi>
#include <st/g0/stm32g0b1v(b-c-e)ix-pinctrl.dtsi>

#include "tt_blackhole_dmc.dtsi"

/* These two I/O have external pull-ups to 1.8V */
&i2c1_scl_pa9 {
    /delete-property/ bias-pull-up;
};
&i2c1_sda_pa10 {
    /delete-property/ bias-pull-up;
};

その下に、chip1 。

コメントを見ると、

  • chip0 (right chip) : remote
  • chip1 (left chip) : local
/*
 * Left chip is local (comes up in non bifercation mode) this is referred to as chip1
 * in the schematics
 * Right chip is remote, and is referred to as chip0
 */

/ {
    model = "Tenstorrent Blackhole p300 board";
    compatible = "tenstorrent,blackhole,p300";

    chosen {
        zephyr,sram = &sram0;
        zephyr,flash = &flash0;
        zephyr,code-partition = &slot0_partition;
    };

    chip1: chip1 {
        compatible = "tenstorrent,bh-chip";

        asic_reset {
            compatible = "zephyr,gpio-line";
            label = "Line to asic reset";
            gpios = <&gpiob 1 GPIO_ACTIVE_LOW>;
        };

        spi_reset {
            compatible = "zephyr,gpio-line";
            label = "Line to SPI reset";
            gpios = <&gpioc 8 GPIO_ACTIVE_LOW>;
        };

        pgood {
            compatible = "zephyr,gpio-line";
            label = "PGOOD signal for asic 1";
            gpios = <&gpioc 5 GPIO_PULL_DOWN>;
        };

        therm_trip {
            compatible = "zephyr,gpio-line";
            label = "Thermal trip indicator";
            gpios = <&gpioc 9 GPIO_ACTIVE_HIGH>;
        };

        jtag {
            compatible = "zephyr,jtag-gpio";
            status = "okay";
            tck-gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
            tdi-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
            tdo-gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
            tms-gpios = <&gpiod 12 GPIO_ACTIVE_HIGH>;
            port-write-cycles = <2>;
            tck-delay = <1>;
        };

        strapping {
            gpio6 {
                compatible = "zephyr,gpio-line";
                label = "GPIO pin representing strap gpio6";
                gpios = <&chip1_strapping 4 GPIO_ACTIVE_HIGH>;
            };
        };

        flash = <&chip1_flash>;
        spi_mux {
            compatible = "zephyr,gpio-line";
            label = "Line to spi mux, drive low to enable dmfw -> eeprom";
            gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
        };

        arc = <&chip1_arc>;
    };

jtag が付いていますね。

     jtag {
            compatible = "zephyr,jtag-gpio";
            status = "okay";
            tck-gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
            tdi-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
            tdo-gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
            tms-gpios = <&gpiod 12 GPIO_ACTIVE_HIGH>;
            port-write-cycles = <2>;
            tck-delay = <1>;
        };

        strapping {
            gpio6 {
                compatible = "zephyr,gpio-line";
                label = "GPIO pin representing strap gpio6";
                gpios = <&chip1_strapping 4 GPIO_ACTIVE_HIGH>;
            };
        };

Clock

Clock は、同じです。

&clk_lsi {
    clock-frequency = <DT_FREQ_K(32)>;
    status = "okay";
};

&clk_hsi {
    clock-frequency = <DT_FREQ_M(16)>;
    status = "okay";
};

&pll {
    clocks = <&clk_hsi>;
    div-m = <1>;
    mul-n = <8>;
    div-r = <2>;
    div-q = <2>;
    div-p = <2>;
    status = "okay";
};

&rcc {
    clocks = <&pll>;
    clock-frequency = <DT_FREQ_M(64)>;
    ahb-prescaler = <1>;
    apb1-prescaler = <1>;
};

I2C

I2C も同じ

&i2c1 {
    pinctrl-0 = <&i2c1_scl_pa9 &i2c1_sda_pa10>;
    pinctrl-names = "default";
    status = "okay";
    clock-frequency = <I2C_BITRATE_FAST>;

    ina228: ina228@40 {
        compatible = "ti,ina228";
        reg = <0x40>;
        status = "okay";
        /* max_current / (2^19) */
        current-lsb-microamps = <210>;
        rshunt-micro-ohms = <1000>;
    };

    gpiox0: gpio@38 {
        compatible = "nxp,pca9554";
        reg = <0x38>;
        status = "okay";
        ngpios = <8>;
        /* external pull-up to 1.8V */
        int-gpios = <&gpioa 1 GPIO_ACTIVE_LOW>;

        gpio-controller;
        #gpio-cells = <2>;
    };

    gpiox1: gpio@39 {
        compatible = "nxp,pca9554";
        reg = <0x39>;
        status = "okay";
        ngpios = <8>;
        /* external pull-up to 1.8V */
        int-gpios = <&gpioa 1 GPIO_ACTIVE_LOW>;

        gpio-controller;
        #gpio-cells = <2>;
    };

    gpiox2: gpio@3a {
        compatible = "nxp,pca9554";
        reg = <0x3a>;
        status = "okay";
        ngpios = <8>;
        /* external pull-up to 1.8V */
        int-gpios = <&gpioa 1 GPIO_ACTIVE_LOW>;

        gpio-controller;
        #gpio-cells = <2>;
    };

    gpiox3: gpio@3b {
        compatible = "nxp,pca9554";
        reg = <0x3b>;
        status = "okay";
        ngpios = <8>;
        /* external pull-up to 1.8V */
        int-gpios = <&gpioa 1 GPIO_ACTIVE_LOW>;

        gpio-controller;
        #gpio-cells = <2>;
    };
};

&i2c3 {
    pinctrl-0 = <&i2c3_scl_pa7 &i2c3_sda_pb4>;
    pinctrl-names = "default";
    status = "okay";
    clock-frequency = <I2C_BITRATE_FAST>;
    compatible = "st,tt-stm32-i2c";

    scl-gpios = <&gpioa 7 GPIO_OPEN_DRAIN>;
    sda-gpios = <&gpiob 4 GPIO_OPEN_DRAIN>;

    bh_arc: i2c@54 {
        compatible = "zephyr,i2c-target-eeprom";
        reg = <0x54>;
        status = "okay";
    };

    aardvark: eeprom@55 {
        compatible = "zephyr,i2c-target-eeprom";
        reg = <0x55>;
        status = "okay";
    };
};

SPI

&spi1 {
    pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pb3
             &spi1_miso_pa11 &spi1_mosi_pa12>;
    pinctrl-names = "default";
    status = "okay";

    flash1: flash@0 {
        /* base properties */
        compatible = "jedec,spi-nor";
        status = "okay";

        reset-gpios = <&gpioc 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;

        /* spi-device properties */
        reg = <0>;
        spi-max-frequency = <7999999>;
        spi-cpol;
        spi-cpha;

        /* jedec,spi-nor properties */
        size = <DT_SIZE_M(512)>; /* Size in bits */

        /* jedec,spi-nor-common properties */
        has-dpd;
        t-enter-dpd = <3000>;
        t-exit-dpd = <30000>;
        jedec-id = [20 bb 20];
    };
};

FLASH

FLASH も同じ

&flash0 {
    /* TODO:
     * Move slot1_partition to spi flash.
     * Ensure main flash erase size agrees with minimal subsector erase size of SPI flash,
     * i.e. 4096 bytes. Currently sectors are 2048 bytes on stm32g071rb and this value is
     * likely hard-coded in several places.
     */
    /* erase-block-size = <4096>; */

    partitions {
        compatible = "fixed-partitions";
        #address-cells = <1>;
        #size-cells = <1>;

        boot_partition: partition@0 {
            label = "mcuboot";
            reg = <0x00000000 DT_SIZE_K(48)>;
            read-only;
        };

        slot0_partition: partition@c000 {
            label = "image-0";
            reg = <0x0000c000 (DT_SIZE_K(230) + DT_SIZE_K(2))>;
        };

        slot1_partition: partition@46000 {
            label = "image-1";
            reg = <0x00046000 (DT_SIZE_K(230))>;
        };
    };
};

SMBUS

SMBUSは、ちょっと違いますね。

/*
 * I2C1_SW_EN is F8
 * I2C1 is I2C1
 * I2C1 is Chip0
 */
&smbus1 {
    status = "okay";
    compatible = "st,tt-stm32-smbus";

    chip0_arc: bh_arc@A {
        compatible = "tenstorrent,bh-arc";
        reg = <0xA>;

        gpios = <&gpiof 8 GPIO_ACTIVE_LOW>;
    };
};
/*
 * I2C0_SW_EN is F9
 * I2C0 is I2C3
 * I2C0 is Chip1
 */
&smbus3 {
    status = "okay";
    compatible = "st,tt-stm32-smbus";

    chip1_arc: bh_arc@A {
        compatible = "tenstorrent,bh-arc";
        reg = <0xA>;

        gpios = <&gpiof 9 GPIO_ACTIVE_LOW>;
    };
};

おわりに

P300の dts を見てみました。

というドキュメントがあります。

このドキュメントにしたがって、build するんですね。