Vengineerの妄想(準備期間)

人生は短いけど、長いです。人生を楽しみましょう!

Learn to Use OVM-SC Library in a SystemC Test Environment

Verification Engineerの戯言

本日、
Learn to Use OVM-SC Library in a SystemC Test EnvironmentWeb Seminarが行われます。

Aldec社のRiviera-PROOVM-SC 2.0.1 Libraryが使えるようです。

アジェンダは、つぎのようになっています。
引用:
    * Introduction
    * OVM Methodology and Overview
    * OVM-SC library overview
    * OVM_SC object and component base classes
    * Phased test flow
    * Top-down parameter configuration and type overrides of the design components
    * Connecting HDL DUT to SystemC test environment
    * Demonstration
    * OVM-SC Free Package Description & Access
    * Question and Answer Session

検証、Verification、SystemVerilog、OVM、Open Verification Methodology、SystemC